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CONTEC High-speed Digital I/O PCI Express Card 50MHz Bi-directional 32ch (Bus Master Non-isolated 3.3VDC-LVTTL) DIO-32DM3-PE

32channels of unisolated LVTTL level I/O (32 input channels / each 16 channels for I/O / 32 output channels are selected). Sampling and generating with transfer rate at 50MHz maximum

This product is a PCI Express bus-compliant interface card that supports transfer by bus mastering and performs input/output between the external device and digital signal. This product features unisolated LVTTL level (Operating voltage : 3.3V) I/O 32channels and you can select input / output in 16 units. Bus master transfer makes it possible to sample quickly large data with transfer rate at 50MHz maximum. It can be used as a pattern generator that outputs arbitrary digital patterns at high speed. It can also be used as a general-purpose I/O card when bus mastering is not used. Windows driver is bundled with this product. Using the dedicated library VI-DAQ makes it possible to create each application for LabVIEW.

High-speed Digital I/O PCI Express Card 50MHz Bi-directional 32ch (Bus Master Non-isolated 3.3VDC-LVTTL)

Model:

DIO-32DM3-PE

Maker:

CONTEC Co., Ltd.

Features

  • 32channels of unisolated LVTTL level I/O (32 input channels / each 16 channels for I/O / 32 output channels are selected.)
    This product has 32channels (operating voltage 3.3VDC, positive logic) of unisolated LVTTL level I/O whose response speed is 20nsec. They can be used for 32bit input, 16bit input plus 16bit output, or for 32bit output. Other than I/O bits, this product has the control signals (clock, start, stop and handshake signal (REQ, ACK) that can control starting and stopping the sampling (input) / generating (output)).

  • Sampling and generating with transfer rate at 50MHz maximum
    Bus master transfer makes it possible to sample (input) or generate (output) large data with transfer rate at 50MHz maximum. As the sampling and generating features have their own bus mastering blocks each made up of two independent channels, the card can generate 16 signals while sampling 16 signals.

  • A synchronization control connector is provided for synchronized control of multiple cards.
    A synchronization control connector is provided for synchronized control of up to 16 cards. It is also easy to synchronize operation with other CONTEC cards that have a synchronization control connector.

  • You can use Max. 4 input signals as interrupt request signals at the time of using the general-purpose I/O.
    You can use up to 4 input signals as interrupt request signals and also disable or enable the interrupt in bit units at the time of using the general-purpose I/O.

  • Windows/Linux compatible driver libraries are attached. Compatible with application software for pattern generators and logic analyzers (Windows version only).
    Using the attached driver library API-PAC(W32) makes it possible to create applications of Windows/Linux. In addition, a diagnostic program by which the operations of hardware can be checked is provided.
    Compatible with application software for pattern generators and logic analyzers (Windows version only). Supports the software “C‑LogicDesigner,” which enables digital signal generation and logic analyzer functionality through signal sampling. Equipped with an intuitive and easy‑to‑use GUI‑based logic pattern creation function.

  • Functions and connectors are compatible with PCI compatible card PIO-32DM(PCI) and PCI Express compatible cards DIO-32DM2-PE and DIO-32DM-PE.
    The functions same with PCI compatible card PIO-32DM(PCI) and PCI Express compatible cards DIO-32DM2-PE and DIO-32DM-PE are provided. In addition, as there is compatibility in terms of connector shape and pin assignments, it is easy to migrate from the existing system.

Specifications

Add-on Module

Series
Bus Specification PCI Express
Size Low Profile
Used Connector 0.8mm-pitch 68-pin (Female)

Digital I/O

Input Channels –
Output Channels –
Bi-directional I/O Channels 48-ch
Response Time (Input) 200nsec (max.)
Response Time (Output) 200nsec (max.)
Operating Voltage (Input) 3.3VDC-LVTTL
Operating Voltage (Output) 3.3VDC-LVTTL
Input Circuit Non-isolated LVTTL level input (Positive logic)
Output Circuit Non-isolatedLVTTL level output (Positive logic)
Built-in Power Supply –

Supported OS

Supported OS Windows 11 (64-bit); Windows 10 IoT Enterprise LTSC 2021 (64-bit); Windows 10 IoT Enterprise 2019 LTSC (64-bit); Windows 10 IoT Enterprise LTSB 2016 (64-bit); Windows 10 (64-bit); Windows 10 (32-bit); Windows 8.1 (64-bit); Windows 8.1 (32-bit); Windows 7 (64-bit); Windows 7 (32-bit); Windows Vista (64-bit); Windows Vista (32-bit); Windows XP (64-bit); Windows XP (32-bit); Windows 2000 (32-bit); Windows Server 2022; Windows Server 2019; Windows Server 2016 ; Windows Server 2012 R2; Windows Server 2008 (64-bit); Windows Server 2008 (32-bit); Windows Server 2003 (64-bit); Windows Server 2003 (32-bit); Linux

* The supported OS differs depending on the software used for this product. For more details about supported OS and distribution, please refer to the software Readme or online help.

System specifications

Item Specifications
Digital section Number of I/O Channels 32channels (select input 32channels / I/O each 16channels / output 32 channels by software)
I/O circuit Operating voltage 3.3VDC
Input section Input format Non-isolated LVTTL level (Equivalent to 74LVT245B) (positive logic)
* 5V TTL level input enabled
Pull-up None/3.3V/5V
Interrupt <When general-purpose I/O is used>
4 interrupt input signals are arranged into a single output of interrupt signal INTA.
An interrupt is generated at the rising edge (LOW-to-HIGH transition).
Pull-up resistor 10kΩ
Output section Output format Non-isolated LVTTL level (Equivalent to 74LVT245B) (positive logic)
Rating (Max.) 3.3VDC 32mA
Response time 20nsec
Data access method General-purpose digital I/O or I/O with bus master transfer
Echo-back function Available (at general-purpose output)
Pattern input Sampling start trigger Software start/External start/Pattern match/SC connector
Sampling stop trigger Software stop/External stop/End of transfer/Transfer error/Specified number of items/SC connector
Sampling clock Sampling timer/External clock input/handshake/SC connector
Sampling timer 20ns – 21s, 5ns unit
Pattern output Generating start trigger Software start/External start/SC connector
Generating stop trigger Software stop/External stop/End of transfer/Transfer error/Specified number of items/SC connector
Generating clock Output timer/External clock input/Handshake/SC connector
Generating timer 20ns – 21s, 5ns unit
Control signal I/O signal level Non-isolated LVTTL level
* 5V TTL level input enabled , * 3.3V / 5V pull-up can be set
REQ signal (handshake) Negative logic tL=25ns (Min.)
ACK signal (handshake) Negative logic tL=25ns (Min.)
External start signal Selection of rising/falling edge with the software
External stop signal Selection of rising/falling edge with the software
External clock input f=20 MHz (Max.)
Bus master section DMA channels 2channels (one each for input and output)
Transfer bus width 64/32bit width
Transfer rate 360 MB/sec.
FIFO 4K data/ch
Scatter/Gather function 2GB/ch
Synchronization section Control output signal Selection of output signal with the software when specifying a sync master board.
Control input signal Selection of sync factor with the software when specifying sync slave boards.
Max. board count for connection 16 boards including the master board
Common section Allowable distance of signal extension 1.5m (dependent on wiring environment)
Memory addresses Occupies 2 locations 256MByte
Current consumption 3.3V 600mA (Max.) , 12V 30mA (Max.)
Bus specification PCI Express Base Specification Rev.2.0 x1
Dimension (mm) 169.33(L) x 110.18(H)
Weight 150g

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